ResponsibilitiesWorkcloselywiththedesignteamtoreviewandunderstandspecifications/architectures/micro-architecturesDefinetestplansDevelopblocklevelandchiplevelverificationenvironmentsProducefunctional/codecoveragemetricsRunregressionanddebug/triagefailuresinsimulationenvironmentValidatefeaturesandworkwithsoftwareteamstodebugissuesinthelabQualificationsRequired:BSEEwith7+yearsorMSEEwith5+yearsexperiencesAdvancedknowledgeofstandardASIC/FPGAverificationflowsincludingsimulation,testbenchdevelopment,andpostsiliconvalidationExcellentknowledgeofSystemVerilogandVerilogExperienceindevelopingtestbenchesusingtheOVM,VMMorUVMmethodologyGoodknowledgewithC/C++ExperiencewitheitherPerlorPythonscriptsKnowledgeofindustryhighspeedinterfacestandardprotocols(PCIExpress,DDR,NANDFlashetc.)stronglydesiredExperienceincomputerstorageandnetworkingisdesiredShouldbeateamplayerwithexcellentcommunicationskillsandthedesiretotakeondiversechallenges
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职位发布者
吴丽丽
人事部
最近在线时间：2023-02-09 11:02
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